Framework for Evaluating Authentication Methods for Treaty-Related Processor Systems

In order to support monitoring and verification technology concepts with higher levels of functionality, many levels of processor complexity have been proposed for use in data analysis, system integration, and information barriers. The processor often appears to be the most complex part of the system in these cases. The conventional wisdom is that authentication – the process by which the inspecting party gains trust in the monitoring or verification equipment – becomes more difficult with increasing equipment complexity, so that the processor may appear to be the most difficult part of the system to authenticate. If a processor is necessary to perform a function, then authenticating the processor becomes a high priority in the system. In this paper, we describe a framework under investigation that can be used to evaluate potential authentication methods for processors. The framework will be used to compare various types of processors, from application specific integrated circuits (ASICs) to field programmable gate arrays (FPGAs) to a range of general purpose processors running custom software. The framework will group potential authentication methods into classes that have a similar function and purpose, and discuss specific tools or processes that fall into those classes. Finally, the framework will include an assessment of the value and cost of each authentication method to be evaluated.